1. Field of the Invention
Embodiments of the invention relate to a computer system; and more specifically, to an autonomous mechanism for initializing non-volatile random access memory.
2. Description of the Related Art
A. Current Memory and Storage Configurations
One of the limiting factors for computer innovation today is memory and storage technology. In conventional computer systems, system memory is typically implemented by dynamic random access memory (DRAM). DRAM-based memory consumes power even when no memory reads or writes occur because it must constantly recharge internal capacitors. DRAM-based memory is volatile, which means data stored in DRAM memory is lost once the power is removed. Further, DRAM devices are typically assembled into a Dual In-Line Memory Module (DIMM), which typically includes an Electrically Erasable Programmable Read-Only Memory (EEPROM) to store Serial Presence Detect (SPD) data. The SPD data contains information about the DIMM size, type, manufacturer, timing, and other information about the memory. The EEPROM (also referred to as “SPD EEPROM”) can be accessible through a System Management Bus (SMbus).
When a computer system boots up, its Basic Input and Output System (BIOS) reads the SPD data of all of the DIMMs in the system, and, based on the SPD data, configures the memory controller to initialize the memory subsystem. The BIOS code heavily depends on the DIMM technology and the memory controller implementation. Whenever a new memory technology is introduced, a different BIOS code needs to be used or it may not work with an existing memory controller. Further, the complexity of the memory initialization is high and the access speed to the SPD data is low. Therefore, it can take several seconds to initialize the system memory.
B. Phase-Change Memory (PCM) and Related Technologies
Phase-change memory (PCM), also sometimes referred to as PCME, PRAM, PCRAM, Ovonic Unified Memory, Chalcogenide RAM and C-RAM, is a type of non-volatile computer memory which exploits the unique behavior of chalcogenide glass. As a result of heat produced by the passage of an electric current, this material can be switched between two states: crystalline and amorphous. Recent versions of PCM can achieve two additional distinct states, effectively doubling memory storage capacity. PCM is one of a number of new memory technologies competing in the non-volatile role with flash memory (also referred to as “flash”). Flash memory has a number of practical problems which these replacements hope to address.
For example, PCM can offer much higher performance in applications where writing quickly is important, in part because the memory element can be switched more quickly, and also because individual bits may be changed to either 1 or 0 without the need to first erase an entire block of cells (as is the case with flash). The high performance of PCM makes it potentially very beneficial in non-volatile memory roles that are currently performance-limited by memory access timing.
Additionally, while PCM devices degrade with use, they degrade much more slowly compared to flash. A PCM device may survive approximately 100 million write cycles. PCM lifetime is limited by mechanisms such as degradation due to GeSbTe (GST) thermal expansion during programming, metal (and other material) migration, and other mechanisms.